1. Field of the Invention
The present invention relates to semiconductor devices and methods for fabricating semiconductor devices, and more particularly, to packaging and fabrication methods that reduce soft errors in semiconductor devices including memory cells.
2. Description of the Related Art
Packaging protects semiconductor chips from the external environment. For example, in a plastic package, a molding compound encapsulates and protects a semiconductor chip from moisture and contaminants. However, the molding compound may contain radio active elements that can cause soft errors in the semiconductor chip. Soft errors correspond to the phenomenon where an alpha particle or other radiation enters a memory cell and changes the state of a data bit in the memory cell. Soft errors thus degrade the reliability of data stored in the semiconductor chip. Molding compounds usually contain elements that can emit alpha particles which can cause a soft error in a semiconductor chip. Accordingly, efforts have been made to reduce the content of alpha particle emitting elements in molding compounds. However, soft errors continue to be a concern for the semiconductor manufacturing industry as the integration level of semiconductor devices increases because the smaller feature sizes of devices in integrated circuits make alpha particles more effective at causing soft errors.
In addition to the reduction of alpha particle emitting elements in molding compounds, other methods have been suggested for preventing soft errors. For example, coating a polymer on the chip forms a layer that can block alpha particles. Also, modifying the layout of an integrated circuit can make a chip less susceptible to the alpha particles from the packaging structures.
Typically, a chip coating is a polyimide layer, which is approximately 10 xcexcm or more thick, on a passivation layer of a semiconductor chip. The polyimide layer or coating reduces the energy of the alpha particles from the molding compound and other sources. U.S. Pat. No. 6,391,915, entitled xe2x80x9cIntegrated Circuit Having Reduced Soft Errors And Reduced Penetration Of Alkali Impurities Into The Substratexe2x80x9d, which is incorporated here as reference in its entirety, discloses such coating technology.
In recent years, the physical and electrical limitations of plastic packages have driven the development of new package types. For example, a chip scale package (CSP) does not include the molding compound which is used for plastic packages. However, a CSP has solder bumps formed on the chip as external terminals of the CSP. The solder bumps typically include polonium (Po) as an impurity, and polonium emits alpha particles that can cause soft errors. The flux of the alpha particles from solder is greater than the alpha particle flux from the typical molding compound. Accordingly, conventional chip coatings cannot effectively prevent soft errors in CSPs and other similar semiconductor device packages.
To solve the above problems, an embodiment of the present invention provides a method for fabricating a semiconductor device that is capable of reducing soft errors. The method coats a chip with a material such as benzo cyclo butene (BCB) which has superior ability to block or slow alpha particles and has a low water intake rate when compared to a conventional polyimide layer.
According to one embodiment of the invention, a method for fabricating a semiconductor device, capable of reducing soft error, includes forming a top metal layer on a semiconductor substrate on which an integrated circuit including a memory cell is formed. Here, the top metal layer includes a bondpad. A passivation layer is on the top metal layer and patterned to expose the bondpad. A metal pattern is formed on the passivation layer and connected to the bondpad for bondpad redistribution, and an insulating layer including a benzo cyclo butene (BCB) layer is formed on the metal pattern.
The insulating layer can be a single BCB layer or can be composed of a BCB layer and a polyimide layer. In the latter case, either one of the BCB layer and the polyimide layer can be formed on the other. The effective thickness of the BCB layer for alpha particle suppression is 10 to 100 xcexcm. The passivation layer commonly includes a layer selected from a group consisting of a silicon nitride (SiN) layer, a titanium nitride (TiN) layer, a plasma enhanced oxide (PEOX) layer and a phosphor-silicate glass (PSG) layer.
In alternative embodiments of the invention, the BCB layer can be between the metal pattern and the bondpad or incorporated between an upper passivation layer and a lower passivation layer.
The BCB layer hardly emits alpha particles and effectively blocks or slows alpha particles emitted from solder bumps that may be attached to the redistributed bonding pads, and thus the BCB layer reduces soft errors in the semiconductor chip. Additionally, since the BCB layer has a low moisture absorption ratio, moisture-related package problems also can be reduced.